RISC-V-emulator implementation useable for ACT riscv-arch-test.
RISC-V-emulator-Native
The emulator, compiled as a normal program. The same core that runs on microcontrollers builds as a native executable, and the ACT test harness runs it as the device under test.
What you get
- PlatformIO and CMake build configs.
- The emulator core with a memory shim.
- `generate-isa-extension-combination.py`, which turns a strength-4 covering array into build environments.
The matrix
`run-matrix.py` builds every ISA combination with gcc, clang, tcc and icx, one build dir each, in parallel. The matrix catches compiler-specific warnings a single-compiler build never shows. I run it after every source change.